IWOMP 2023

IWOMP 2023 Program

The following OpenMP events were hosted at the University of Bristol.

  • EuroMPI – 11-13 Sept.  See eurompi23.github.io for program details
  • IWOMP – 12-15 Sept.  See program below
  • MPI Forum Meeting – 14-15 Sept.  See www.mpi-forum.org for details

IWOMP 2023 Proceedings

Free access for conference attendees will be granted for 4 weeks until October 6, 2023. Attendees should use the password provided at the conference to access the IWOMP 2023 Proceedings.

Tuesday 12 September

08:30 Registration and Refreshments
09:00 Tutorial: Hands-On Using OpenMP Offload (Part 1)
Tom Deakin and Wei-Chen (Tom) Lin, University of Bristol.
View Presentation Slides (Parts 1-4)
10:30 Morning Break & Networking
11:00 Tutorial: Hands-On Using OpenMP Offload (Part 2)
12:30 Lunch & Networking
13:30 Tutorial: Hands-On Using OpenMP Offload (Part 3)
15:00 Afternoon Break & Networking
13:30 Tutorial: Hands-On Using OpenMP Offload (Part 4)
17:00 Close

Wednesday 13 September

08:30 Registration and Refreshments
09:00 Tutorial: Advanced OpenMP (Part 1)
View Presentation Slides (Parts 1 and 2)
10:30 Morning Break & Networking
11:00 Tutorial: Advanced OpenMP (Part 2)
12:30 Lunch & Networking
13:30 Welcome and Introductions
14:00: Keynote Presentation: Joint EuroMPI/IWOMP
Professor David May. Emeritus Professor, Department of Computer Science at the University of Bristol and a Fellow of The Royal Society. Wikipedia biography
15:00 Afternoon Break & Networking
Papers I: OpenMP Offload Experiences
Session Chair: Simon McIntosh-Smith
15:30 OpenMP Target Offload Utilizing GPU Shared Memory
Mathias Gammelmark, Anton Rydahl and Sven Karlsson [#07]
16:00 Improving a Multigrid Poisson Solver with Peer-to-Peer Communication and Task Dependencies
Mathias Gammelmark, Anton Rydahl and Sven Karlsson. [#11]
16:30 The Kokkos OpenMPTarget Backend: Implementation and Lessons Learned
Stephen Olivier, Rahulkumar Gayatri, Christian Trott, Johannes Doerfert, Jan Ciesko and Damien Lebrun-Grandie. [#13]
17:00 Close
19:00 Conference Dinner
Joint dinner for attendees of IWOMP, EuroMPI and MPI Forum Attendees. See Travel Information for location.

Thursday 14 September

8:30 Refreshments
09:00 Welcome and Introduction
09:15 Invited Talk: El Capitan: The First NNSA Exascale System
Bronis R. de Supinski, Lawrence Livermore National Laboratory (LLNL)

View Abstract

Livermore Computing (LC), Lawrence Livermore National Laboratory’s (LLNL’s) supercomputing center, and HPE are deploying the first US exascale system focused on national security. This talk will provide an overview of the preparations for LC’s first exascale system, as well as details of its system architecture. Throughout, the talk will explore considerations for energy efficiency in large-scale systems.

View Biography

As Chief Technology Officer (CTO) for Livermore Computing (LC) at Lawrence Livermore National Laboratory (LLNL), Bronis R. de Supinski formulates LLNL’s large-scale computing strategy and oversees its implementation. He frequently interacts with supercomputing leaders and oversees many collaborations with industry and academia. He has served as the Chair of the OpenMP Language Committee since 2009. In addition to his work with LLNL, Bronis is also a Professor of Exascale Computing at Queen’s University of Belfast. He is a Fellow of the ACM and the IEEE.

10:30 Morning Break & Networking
Papers II: OpenMP Infrastructure and Evaluation
Session Chair: Chunhua Liao
11:00 Improving Simulations of Task-Based Applications on Complex NUMA Architectures
Samuel Thibault, Idriss Daoudi, Thierry Gautier and Swann Perarnau. [#08]
11:30 Experimental Characterization of OpenMP Offloading Memory Operations and Unified Shared Memory Support
Wael Elwasif. [#19]
12:00 OpenMP Reverse Offloading Using Shared Memory Remote Procedure Calls
Jonathan Chesterfield and Joseph Huber. [#12]
12:30 Lunch & Networking
Papers III: Tasking Extensions
Session Chair: Stephen Olivier
13:30 How to Efficiently Parallelize Irregular DOACROSS Loops Using Fine Granularity and OpenMP Tasks: The SPEC mcf Case
Juan Salamanca and Alexandro Baldassin. [#16]
14:00 Introducing Moldable Task in OpenMP
Pierre-Etienne Polet, Ramy Fantar and Thierry Gautier . [#14]
14:30 Suspending OpenMP Tasks on Asynchronous Events: Extending the Taskwait Construct
Maël Martin, Romain Pereira, Adrien Roussel, Patrick Carribault and Thierry Gautier. [#03]
15:00 Afternoon Break & Networking
Implementer Updates
Session Chair: Tom Lin
15:30 GCC – Andrew Stubbs, Siemens
15:55 clang – Johannes Doerfert, LLVN
16:20 AMD Compiler for CPU and GPU – Greg Rodgers, AMD
16:45 Closing Remarks
17:00 Close

Friday 15 September

08:30 Refreshments
09:00 Welcome and Introduction
09:15 Invited Talk: Having it all: Can software be portable, performant and productive?
Dr Chris Maynard, Met Office.

View Abstract

Weather and climate models simulate complex, multi-scale physics. They can deliver substantial value for society utilising their predictive power. However, It can take a decade or more to develop a new model. Moreover, computer architectures and the programming models used to develop the software have evolved on a much shorter timescale and become more complex. How can large science applications achieve the three P’s? In this presentation the Domain Specific Language (DSL) approach being adopted by the Met Office in developing its next generation model, LFRic, will be discussed. How OpenMP is used to on modern CPUs and how it being employed to exploit the computational power of GPUs described. To conclude, some of the implications of the use of DSLs for parallelism, for general purpose languages and programming model specifications such as OpenMP will be considered.

View Biography

Dr Chris Maynard joined the Met Office in 2012 as a senior scientific software engineer. He was promoted to expert in 2013 and has led the software development of the Met Office next generation model, LFRic. Prior to 2012, at the Edinburgh Parallel Computing Centre (EPCC) he developed and optimised scientific software for supercomputers in diverse scientific fields. He obtained his PhD in 1998 from the University of Edinburgh in theoretical particle physics. His research interests include performance optimisation, parallel programming models, languages and algorithms and from 2018 until 2023 he was jointly Associate Professor in Computer Science at the University of Reading. Since August 2022 Dr Maynard has been a Met Office fellow and leads the performance optimisation of the next generation modelling system, Momentum.

10:30 Morning Break & Networking
Papers IV: Beyond Explicit GPU Support
Session Chair: Tom Scogland
11:00 Multipurpose Cacheing to accelerate OpenMP Target Regions on FPGAs
Julian Brandner, Florian Mayer and Michael Philippsen. [#06]
11:30 Generalizing Hierarchical Parallelism
Michael Kruse. [#05]
12:00 Exploring the Limits of Generic Code Execution on GPUs via Direct (OpenMP) Offload
Johannes Doerfert, Shilei Tian and Barbara Chapman. [#01]
12:30 Lunch & Networking
Papers V: OpenMP and AI
Session Chair: Johannes Doerfert
13:30 OpenMP Advisor: A Compiler Tool for Heterogeneous Architectures
Rolando Enriquez, Alok Mishra, Abid M. Malik, Meifeng Lin and Barbara Chapman. [#02]
14:00 Towards Effective Language Model Application in High-Performance Computing
Chunhua Liao, Le Chen, Pei-Hung Lin, Tristan Vanderbruggen, Murali Emani and Bronis R. de Supinski. [#18]
14:30 Advising OpenMP Parallelization via a Graph-Based Approach with Transformers
Tal Kadosh, Gal Oren, Nadav Schneider, Niranjan Hasabnis, Timothy Mattson and Yuval Pinter. [#04]
15:00 Close
IWOMP 20232024-04-12T15:11:14+01:00

IWOMP 2022

University of Tennessee

IWOMP 2022 Program

IWOMP 2022 was held in Chattanooga, TN, United States, at the University of Tennessee. Travel and Venue information.

Registration options includes single-event passes for IWOMP and OpenMP tutorials as well as all-week passes that also included EuroMPI/USA. All passes were available for either on-site, in-person attendance, or online-only attendance.

The main IWOMP workshop was held on September 27th-30th, 2022. All times EDT.

Proceedings: Access the Proceedings

Tuesday 27th September

Start Time Presentation
12:00pm Lunch – 90 mins
OpenMP Tutorial I
1:30pm Utilizing LLVM/OpenMP to the Fullest: Tips & Tricks for
Application Developers

Johannes Doerfert
3:00pm Break – 30 mins
3:30pm OpenMP Tutorial 1 continues
5:00pm End of Day

Wednesday 28th September

Start Time Presentation
OpenMP Tutorial II
9:00am Partitioned Communication
Presenter: tbd
10:00am BREAK – 30 mins
10:30am OpenMP Tutorial II continues
12:00pm Lunch – 90 mins
Opening Session
1:30pm Introduction and Welcome
Bronis R. de Supinski
Invited Talk I
2:00pm OpenMP and MPI at Exascale – Early Experiences on Frontier
Al Geist
3:00pm Break – 30 mins
Paper Session: OpenMP and Multiple Nodes (Chair: Vivek Kale)
3:30pm Enhancing MPI+OpenMP Task based Applications for Heterogenous Architectures with GPU support
Manuel Ferat, Romain Pereira, Adrien Roussel, Patrick Carribault, Luiz-Angelo Steffenel and Thierry Gautier
4:00pm Towards Efficient Remote OpenMP Offloading
Wenbin Lu, Baodi Shan, Eric Raut, Jie Meng, Mauricio Araya-Polo, Johannes Doerfert, Abid M. Malik and Barbara Chapman
4:30pm End of Day

Thursday 29th September

Start Time Presentation
Paper Session: Exploring New and Recent OpenMP Extensions (Chair: Deepak Eachempati)
9:00am Characterizing the Performance of Task Reductions in OpenMP 5.X Implementations
Jan Ciesko and Stephen Olivier
9:30am Using Off-the-Shelf Hardware Transactional Memory to Implement Speculative While in OpenMP
Juan Salamanca and Alexandro Baldassin
10:00am Break – 30 mins
Paper Session: Effective Use of Advanced Heterogenous Node Architectures
10:30am Towards Automatic OpenMP-Aware Utilization of Fast GPU Memory
Delaram Talaashrafi, Marc Moreno Maza and Johannes Doerfert
11:00am Feasibility Studies in Multi-GPU Target Offloading
Anton Rydahl, Mathias Gammelmark and Sven Karlsson
11:30am Reducing OpenMP to FPGA Round-trip Times with Predictive Modelling
Julian Brandner, Florian Mayer and Michael Philippsen
12:00pm Lunch
Vendor Session I
1:30pm Intel
Xinmin Tian
2:15pm AMD
Gregory Rodgers
3:00pm Break – 30 mins
Paper Session: OpenMP Tool Support (Chair: Sara Royuela)
3:30pm Improving Tool Support for Nested Parallel Regions with Introspection Consistency
Vladimir Indic and John Mellor-Crummey
4:00pm On the migration of OpenACC-based applications into OpenMP 5+
Harald Servat, Giacomo Rossi, Alejandro Duran and Ravi Narayanaswamy
4:30pm End of Day

Friday 30th September

Start Time Presentation
Invited Talk II (Chair: Harald Servat)
9:00am Critical real-time systems: A new horizon for OpenMP
Sara Royuela
10:00am Break – 30 mins
Vendor Session II
10:30am Hewlett Packard Enterprise
Deepak Eachempati
11:15am clang/LLVM community
Johannes Doerfert
12:00pm Lunch
Paper Session: OpenMP and Multiple Translation Units
1:30pm Just-in-Time Compilation and Link Time Optimization for OpenMP Target Offloading
Shilei Tian, Joseph Huber, John Tramm, Barbara Chapman and Johannes Doerfert
2:00pm Extending OpenMP to Support Automated Function Specialization Across Translation Units
Giorgis Georgakoudis, Thomas Scogland, Chunhua Liao and Bronis de Supinski
Closing session
2:30pm Best Paper Award and Concluding Remarks
Bronis R. de Supinski
IWOMP 20222024-04-12T15:09:38+01:00

IWOMP 2021

IWOMP 2021 – Program

Due to the COVID-19 pandemic IWOMP 2021 was completely virtual. All the sessions were presented live. The start times for each session are shown in US Pacific Standard Time (PST) and European Central Time (CET). All speakers and delegates were required to Register to attend. Instructions for joining the online sessions were included in the booking confirmation. In the details below, Speakers are marked in Bold.

Best Paper Award

  • A Case Study of LLVM-Based Analysis for Optimizing SIMD Code Generation
  • Authors: Joseph Huber, Weile Wei, Giorgis Georgakoudis, Johannes Doerfert and Oscar Hernandez

Which was the highest ranked paper by the reviewers.

Proceedings

Monday 13 September  | OpenMPCon

Tuesday 14 September

Start Time Presentation
Keynote:

Productivity, performance and portability: towards cross-domain DSL compiler architecture

Prof. Paul Kelly, Imperial College London

Domain-specific languages enable us to automate generation of high-performance code from a high-level abstraction. This talk will show, through a couple of example projects (Firedrake and Devito) that DSLs can deliver productivity, performance, and performance-portability. The key to success is compiler architecture – designing intermediate representations that making optimisations easy and analysis trivial. But the DSL software ecosystem is dysfunctional: DSL compilers (including ours) are typically standalone projects, reliant on support from a narrow developer base. Few, if any, components are shared between DSLs. The talk will conclude with a manifesto for fixing this – building on MLIR to establish community support for code generation tools that underpin multiple front-end DSLs. I will argue that this is in fact the only way we can tackle the complexity involved in achieving high performance for complex applications on diverse hardware.

Biography: Paul Kelly leads the Software Performance Optimisation group at Imperial College London. His research focus is domain-specific program optimisation, leading to close engagement with colleagues in computational science, robotics and computer vision. This talk covers joint work with many such collaborators.

BREAK – 30 mins
Papers Session I: Synchronization and Data
View Slides Improving Speculative taskloop in Hardware Transactional Memory

Juan Salamanca and Alexandro Baldassin

Vectorized Barrier and Reduction in LLVM OpenMP Runtime

Muhammad Nufail Farooqi and Miquel Pericàs

BREAK – 30 mins
Papers Session II: Tasking Extensions I
View Slides Enhancing OpenMP Tasking Model: Performance and Portability

Chenle Yu, Sara Royuela and Eduardo Quiñones

View Slides OpenMP Taskloop Dependences

Marcos Maroñas, Xavier Teruel and Vicenç Beltran

Day 1 Concludes

Wednesday 15 September

Start Time Presentation
Papers Session III: Applications
Outcomes of OpenMP Hackathon: OpenMP Application Experiences with the Offloading Model

Swaroop Pophale, Barbara Chapman, Buu Pham, Charlene Yang, Christopher Daley, Colleen Bertoni, Dhruva Kulkarni, Dhruva Kulkarni, Dossay Oryspayev, Ed D’Azevedo, Helen He, Johannes Doerfert, Keren Zhou, Kiran Ravikumar, Mark Gordon, Mauro Del Ben, Meifeng Lin, Melisa Alkan, Michael Kruse, Oscar Hernandez, P. K. Yeung, Paul Lin, Peng Xu, Tosaporn Sattasathuchana, Vivek Kale, William Huhn and Dhruva Kulkarni

View Slides An empirical investigation of OpenMP based implementation of Simplex Algorithm

Arkaprabha Banerjee, Pratvi Shah, Shivani Nandani, Shantanu Tyagi, Sidharth Kumar and Bhaskar Chaudhury

View Slides Task inefficiency patterns for a wave equation solver

Holger Schulz, Gonzalo Brito Gadeschi, Oleksandr Rudyy and Tobias Weinzierl

BREAK – 30 mins
Papers Session IV: Case Studies
View Slides Comparing OpenMP Implementations With Applications Across A64FX Platforms

Benjamin Michalowicz, Eric Raut, Yan Kang, Tony Curtis, Dossay Oryspayev and Barbara Chapman Save

View Slides A Case Study of LLVM-Based Analysis for Optimizing SIMD Code Generation

Joseph Huber, Weile Wei, Giorgis Georgakoudis, Johannes Doerfert and Oscar Hernandez

Day 2 Concludes

Thursday 16 September

Start Time Presentation
Papers Session V: Heterogenous Computing & Memory
View Slides Experience Report: Writing A Portable GPU Runtime with OpenMP 5.1

Shilei Tian, Jon Chesterfield, Johannes Doerfert and Barbara Chapman

View Slides FOTV: A generic device offloading framework for OpenMP

Jose Luis Vázquez and Pablo Sanchez

View Slides Beyond Explicit Transfers: Shared and Managed Memory in OpenMP

Brandon Neth, Thomas Scogland, Alejando Duran, Michelle Mills Strout and Bronis R. de Supinski

BREAK – 30 mins
Papers Session VI: Tasking Extensions II
View Slides Communication-Aware Task Scheduling Strategy in Hybrid MPI+OpenMP Applications

Romain Pereira, Adrien Roussel, Patrick Carribault and Thierry Gautier

View Slides An OpenMP Free Agent threads implementation

Victor Lopez, Joel Criado, Raúl Peñacoba, Roger Ferrer, Xavier Teruel and Marta Garcia-Gasulla

IWOMP 2021 Concludes

IWOMP 20212024-04-12T15:04:42+01:00

IWOMP 2020

IWOMP 2020 – Archive

Due to the COVID-19 pandemic, the IWOMP 2020 workshop was completely virtual. Tutorial Day took place on Monday, Sept. 21, followed by the technical program Sept. 22-24: three 6-hr days to help accommodate EU participation. The Tutorial Day was 7 hours in length.  All times are given for US Central Daylight Time (CDT), UTC -5.

Best Paper Awarded to:

FAROS: A Framework To Analyze OpenMP Compilation Through Benchmarking and Compiler Optimization Analysis. Authors: Giorgis Georgakoudis, Johannes Doerfert, Ignacio Laguna and Tom Scogland.  Giorgis Georgakoudis, Johannes Doerfert, Ignacio Laguna and Tom Scogland.

Presentations Slides

The presentation slides for each presentation can be found below each entry in the program, where available.

Conference Proceedings

Free access to the Springer proceedings will be available to conference participants for 4 weeks, (Sep 22 – Oct 19).  To gain access to the proceedings participants should follow the link below and use the password that will be provided to them during the online presentations.

Monday, September 21 | Tutorials

All times are shown in US Central Daylight Time (CDT) zone.

Time Tutorial Name Presenters
8:00 – 10:00 OpenMP Common Core

View Presentation Slides

In this tutorial, we’ll undertake an interactive exploration of the common core of OpenMP. We will cover through discussion and demos the 20 features of OpenMP programmers use all the time. This will give you what you need to become an OpenMP programmer. It will also prepare you for the more advanced OpenMP tutorials later in the day.The tutorial will be based on the C programming language, though Fortran programmers should be able to keep up as we avoid the more complex corners of C. The contents of the tutorial focusses on novice OpenMP programmers, but more experienced OpenMP programmers will benefit as well; they’ll just need to download the exercises (I’ll provide a link to a GitHub repository) so they can explore on their own during the tutorial, adding all the complexity they need to stay engaged.
Tim Mattson, Intel
Tim Mattson is a parallel programmer obsessed with every variety of science (Ph.D. Chemistry, UCSC, 1985). He is a senior principal engineer in Intel’s parallel computing lab.Tim has been with Intel since 1993 and has worked with brilliant people on great projects including: (1) the first TFLOP computer (ASCI Red), (2) MPI, OpenMP and OpenCL, (3) two different research processors (Intel’s TFLOP chip and the 48 core SCC), (4) Data management systems (Polystore systems and Array-based storage engines), and (5) the GraphBLAS API for expressing graph algorithms as sparse linear algebra.Tim is passionate about teaching. He’s been teaching OpenMP longer than anyone on the planet with OpenMP tutorials at every SC’XY conference but one since 1998. He has published five books on different aspects of parallel computing, the latest (Published November 2019) titled “The OpenMP Common Core: making OpenMP Simple Again”.
10:00 – 10:30 Break
10:30 – 12:30 Advanced OpenMP

View Presentation Slides

This tutorial will cover several advanced topics of OpenMP:

  • NUMA Aware programming
  • Vectorization / SIMD
  • Advanced Tasking

Michael Klemm, Intel &
Christian Terboven, RWTH Aachen University
Dr. Michael Klemm is part of the Datacenter Ecosystem Engineering
organization of the Intel Architecture, Graphics and Software group. His focus is on High Performance and Throughput Computing.  He holds an M.Sc.  in Computer Science and a Doctor of Engineering degree (Dr.-Ing.) in Computer Science from the Friedrich-Alexander-University Erlangen-Nuremberg, Germany.  Michael’s research focus is on compilers and runtime optimizations for distributed systems.  His areas of interest include compiler construction, design of programming languages, parallel programming, and performance analysis and tuning.  In 2016, Michael was appointed Chief Executive Officer of the OpenMP Architecture Review Board.


Dr. Christian Terboven is a senior scientist and leads the HPC group at RWTH Aachen University. His research interests center around Parallel Programming and related Software Engineering aspects. Dr. Terboven has been involved in the Analysis, Tuning and Parallelization of several large-scale simulation codes for various architectures. He is responsible for several research projects in the area of programming models and approaches to improve the productivity and efficiency of modern HPC systems.

12:20 – 13:00 Break
13:00 – 15:00 OpenMP Offload (GPUs)

View Presentation Slides

While most HPC developers have MPI experience, many are not familiar with the latest OpenMP features and how to use them in their codes. Modern OpenMP can be used in creative ways to map parallelism to current and emerging parallel architectures. This  tutorial that describes recent and new features of OpenMP for accelerators,  with a focus on those features that have proven important applications.The OpenMP 5.1 specification is scheduled for release at SC’20 with exciting new functionality that improves support for Accelerators.Thus it is important not only for developers to be aware of the current standard, and what is available today, but also what is coming next and what will be available in the exascale time frame (2021).The tutorial is expected to cover the following topics:

  • Overview of what is available today in OpenMP 5.0 for GPUs
  • An overview of the accelerator programming model
    • Examples on how to map data structures
    • How to exploit the parallelism in the target regions
  • How to use OpenMP target and tasking constructs to manage and orchestrate work and communication between the CPUs and accelerators and inter-node communication.
  • Some examples of success stories on how applications have used OpenMP to leverage GPUs on HPC systems.
  • Other uses: Using OpenMP offload via other frameworks Raja/Kokkos
  • A deeper introduction to OpenMP 5.1 and preview of  the latest features in the new spec to manage memory for heterogenous shared memory spaces, unified addresses / memories, deep copy, detach tasks, etc.

Oscar Hernandez, Oak Ridge National Laboratory &
Tom Scogland, Lawrence Livermore National Laboratory
Oscar Hernandez received a Phd in Computer Science from the University of Houston. He is a senior staff member of the Computer Science Research (CSR) Group, which supports the Programming Environment and Tools for the Oak Ridge Leadership Computing Facility (OLCF). He represents ORNL in many specifications such as OpenACC, OpenMP, and benchmarking bodies SPEC/HPG. He is currently part of the SOLLVE ECP team and is the application liaison for the project. At ORNL he also works closely with application teams including the CAAR and INCITE efforts and constantly interacts with them to address their programming model and tools needs via HPC software ecosystems. He is currently working on the programming environment for Summit and works very closely with the vendors to track the evolution of the next-generation programming models. He has worked on many projects funded by DOE, DoD, NSF, and Industrial Partners in the Oil & Gas industry.


Thomas R. W. Scogland received his PhD degree in computer science from Virginia Tech in 2014. He is a computer scientist in the Center for Applied Scientific Computing at Lawrence Livermore National Laboratory. His research interests include parallel programming models, heterogeneous computing and resource management at scale. He serves on the OpenMP Language Committee, the WG14-C and WG21-C++ committees, and as co-chair of the Green500.

Tuesday, September 22 | Program

All times are shown in US Central Daylight Time (CDT) zone.  Presentation Slides are provided at the discretion of the paper authors,
and will not be available until the presentation or shortly afterwards.

Time Presentation
08:00 Introduction

Dan Stanzione, Director of TACC (UT, Texas)

08:10 Keynote I: A Tale of Four Packages

Jack Dongarra, Distinguished Professor, University of Tennessee, Oak Ridge National Laboratory and University of Manchester

Presentation Slides

Abstract.  In this talk we will look at four software packages for dense linear algebra. These packages have been developed over time.  Some of these packages are intended as research vehicles and others as production tools.  The four packages are: BALLISTIC to sustain LAPACK and ScaLAPACK packages.  PLASMA research into multicore implementations.  MAGMA research into GPU implementations. SLATE dense linear algebra for Exascale machines.  We will look at how OpenMP is being used in each.


Speaker Profile: Jack Dongarra holds an appointment at the University of Tennessee, Oak Ridge National Laboratory, and the University of Manchester. He specializes in numerical algorithms in linear algebra, parallel computing, use of advanced-computer architectures, programming methodology, and tools for parallel computers.  He was awarded the IEEE Sid Fernbach Award in 2004;

  • in 2008 he was the recipient of the first IEEE Medal of Excellence in Scalable Computing;
  • in 2010 he was the first recipient of the SIAM Special Interest Group on Supercomputing’s award for Career Achievement;
  • in 2011 he was the recipient of the IEEE Charles Babbage Award;
  • in 2013 he received the ACM/IEEE Ken Kennedy Award;
  • in 2019 he received the ACM/SIAM Computational Science and Engineering Prize, and in 2020 he received the IEEE Computer Pioneer Award.

He is a Fellow of the AAAS, ACM, IEEE, and SIAM and a foreign member of the Russian Academy of Science, a foreign member of the British Royal Society, and a member of the US National Academy of Engineering.

09:00 Papers I: Performance Methodologies
BEST PAPER

FAROS: A Framework To Analyze OpenMP Compilation Through Benchmarking and Compiler Optimization Analysis

Giorgis Georgakoudis, Johannes Doerfert, Ignacio Laguna and Tom Scogland

Presentation Slides

Evaluating the Efficiency of OpenMP Tasking for Unbalanced Computation on Diverse CPU Architectures

Stephen L. Olivier

Presentation Slides

10:00 Break
10:30 Papers II: Applications
A Case Study of Porting HPGMG from CUDA to OpenMP Target Offload

Christopher Daley, Hadia Ahmed, Samuel Williams and Nicholas Wright

Presentation Slides

P-Aevol: an OpenMP Parallelization of a Biological Evolution Simulator, Through Decomposition in Multiple Loops

Laurent Turpin, Thierry Gautier, Jonathan Rouzaud-Cornabas and Christian Perez

Presentation Slides

Evaluating Performance of OpenMP Tasks in a Seismic Stencil Application

Eric Raut, Jie Meng, Mauricio Araya-Polo and Barbara Chapman

Presentation Slides

12:00 Break
12:30 Papers III: OpenMP Extensions
Unified Sequential Optimization Directives in OpenMP

Brandon Neth, Tom Scogland, Michelle Mills Strout and Bronis R. de Supinski

Presentation Slides

Support Data Shuffle Between Threads in OpenMP

Anjia Wang, Xinyao Yi and Yonghong Yan

Presentation Slides

13:30 OpenMP in MLIR and Flang

ARM Sponsor Tech Talk. David Truby, Arm.

Presentation Slides

Abstract. Flang is a new Fortran frontend in the LLVM project. While Flang is a work in progress, when finished it will provide comprehensive support for the latest Fortran and OpenMP standards. Flang uses the new LLVM MLIR technology to generate Fortran and OpenMP codes. This talk will give an overview of status and describe how OpenMP support is being implemented in Flang and MLIR.Flang is a new Fortran frontend in the LLVM project. While Flang is a work in progress, when finished it will provide comprehensive support for the latest Fortran and OpenMP standards. Flang uses the new LLVM MLIR technology to generate Fortran and OpenMP codes. This talk will give an overview of status and describe how OpenMP support is being implemented in Flang and MLIR.


Speaker Profile. David Truby is a senior software engineer at Arm. His latest project has been adding OpenMP support for the LLVM Flang Fortran compiler. He is a PhD candidate at the University of Warwick, with his research focusing on performance portability frameworks and parallel programming models, and has previously worked with IBM Research on OpenMP target offload support in the Clang compiler.

Wednesday, September 23 | Program

All times are shown in US Central Daylight Time (CDT) zone. Presentation Slides are provided at the discretion of the paper authors,
and will not be available until the presentation or shortly afterwards.

Time Presentation
08:00 Keynote II: Programming Models for a Mixed-Signal AI Inference Accelerator

Eric Stotzer, Mythic Inc.

Presentation Slides

Abstract. This talk will cover Mythic’s hybrid mixed-signal computing architecture and unique software development tools, including a Deep Neural Network (DNN) graph compiler. In addition, some ideas will be proposed on how OpenMP can be used to program this type of architecture. Mythic’s Intelligence Processing Units (IPUs) combine analog compute-in-memory acceleration with digital processing elements. They are designed for high-performance and power-efficient AI inference acceleration.

The Mythic IPU is a tile-based dataflow architecture. Each tile has an analog compute array, flash memory for weight storage, local SRAM memory, a single-instruction multiple-data (SIMD) unit, and a control processor. The tiles are interconnected with an efficient on-chip router network.  Mythic has built a unique suite of development tools, including a DNN graph compiler, to enable the rapid deployment of AI inference applications on the IPU. The tools perform such actions as mapping DNNs to tiles, setting up dataflow conditions, and analog-aware program transformations.


Speaker Profile: Eric Stotzer (Ph.D. University of Houston, 2010) is a Fellow and Director of Compiler Research at Mythic.  He is currently working on developing new programming models for mixed-signal AI inference accelerators. Eric was previously with Texas Instruments for 31 years where he was a Distinguished Member Technical Staff. Over the years, he has worked on compilers and tools for micro-controllers and digital signal processors as well as hardware/software co-design efforts for new processor architectures. Eric was the TI representative on the OpenMP Architecture Review Board and co-chair of the OpenMP accelerator subcommittee. Eric is a co-author of Using OpenMP – The Next Step, The MIT Press.

09:00 Papers IV: Performance Studies
Performance Study of SpMV Towards an Auto-tuned and Task-based SpMV (LASs Library)

Sandra Catalan, Tetsuzo Usui, Leonel Toledo, Xavier Martorell, Jesús Labarta and Pedro Valero-Lara

Presentation Slides

A Case Study on Addressing Complex Load Imbalance in OpenMP

Fabian Orland and Christian Terboven

Presentation Slides

10:00 Break
10:30 Papers V: Tools
On-the-fly Data Race Detection with the Enhanced OpenMP Series-Parallel Graph

Nader Boushehrinejadmoradi, Adarsh Yoga and Santosh Nagarakatte

Presentation Slides

AfterOMPT: An OMPT-based tool for Fine-Grained Tracing of Tasks and Loops

Igor Wodiany, Andi Drebes, Richard Neill and Antoniu Pop

Presentation Slides

Co-designing OpenMP Programming Model Features with OMPT and Simulation

Matthew Baker, Oscar Hernandez and Jeffrey Young

Presentation Slides

12:00 Break
12:30 Papers VI: NUMA
sOMP: Simulating OpenMP Task-based Applications with NUMA Effects

Idriss Daoudi, Philippe Virouleau, Thierry Gautier, Samuel Thibault and Olivier Aumage

Presentation Slides

Virtflex: Automatic Adaptation to NUMA Topology Change for OpenMP Applications

Runhua Zhang, Alan L. Cox and Scott Rixner

Presentation Slides

13:30 Intel oneAPI Toolkits

Intel Sponsor Tech Talk. Ron Green, Intel.

Presentation Slides

Thursday, September 24 | Program

All times are shown in US Central Daylight Time (CDT) zone.  Presentation Slides are provided at the discretion of the paper authors,
and will not be available until the presentation or shortly afterwards.

Time Presentation
08:00 Keynote III: OpenMP Enables the Next Frontier of High-Performance Computing
Mark Papermaster, CTO & EVP of Technology and Engineering,  AMD
Abstract. In his keynote, Mark will discuss AMD’s commitment to High Performance Computing, an open ecosystem and how OpenMP fits squarely in AMD’s product strategy to enable heterogeneous computing. He will also take a closer look at AMD’s approach to optimize for performance while maintaining compatibility with multiple programming languages, and heterogeneous architectures. He will also touch on the expected impact for Machine Learning and future Exascale supercomputers. .


Speaker Profile:

Mark Papermaster is Chief Technology Officer and Executive Vice President of Technology and Engineering at AMD and is responsible for corporate technical direction, product development including system-on-chip (SOC) methodology, microprocessor design, I/O and memory and advanced research. He led the re-design of engineering processes at AMD and the development of the award-winning “Zen” high-performance x86 CPU family, high-performance GPUs and the company’s modular design approach, Infinity Fabric. He also oversees Information Technology that delivers AMD’s compute infrastructure and services.

His more than 35 years of engineering experience includes significant leadership roles managing the development of a wide range of products, from microprocessors to mobile devices and high-performance servers. Before joining AMD in October 2011 as Chief Technology Officer and Senior Vice President, Papermaster was the leader of Cisco’s Silicon Engineering Group, the organization responsible for silicon strategy, architecture, and development for the company’s switching and routing businesses. He served as Apple Senior Vice President of Devices Hardware Engineering, where he was responsible for iPod and iPhone hardware development. He also held a number of senior leadership positions at IBM overseeing development of the company’s key microprocessor and server technologies.

Papermaster received his bachelor’s degree from the University of Texas at Austin and master’s degree from the University of Vermont, both in Electrical Engineering. He is a long-term member of the University of Texas Cockrell School of Engineering Advisory Board, Olin College Presidents Council and the Juvenile Diabetes Research Foundation. Most recently, he was appointed to the CTO Forum Advisory Board and IEEE Industry Advisory Board.

09:00 Papers VII: Compilation Techniques
Using OpenMP to Detect and Speculate Dynamic DOALL Loops

Bruno Chinelato Honorio, João P. L. de Carvalho, Munir Skaf and Guido Araujo

Presentation Slides

ComPar: Optimized Multi-Compiler for Automatic OpenMP S2S Parallelization

Idan Mosseri, Lee-Or Alon, Re’Em Harel and Gal Oren

Presentation Slides

10:00 Break
10:30 Papers VIII: Heterogeneous Computing
OpenMP Device Offloading to FPGAs Using the Nymble Infrastructure

Jens Huthmann, Lukas Sommer, Artur Podobas, Andreas Koch and Kentaro Sano

Presentation Slides

Data Transfer and Reuse Analysis Tool for GPU-offloading Using OpenMP

Alok Mishra, Abid Malik and Barbara Chapman

Presentation Slides

Toward Supporting Multi-GPU Targets via Taskloop and User-defined Schedules

Vivek Kale, Wenbin Lu, Anthony Curtis, Abid Malik, Barbara Chapman and Oscar Hernandez

Presentation Slides

12:00 Break
12:30 Papers IX: Memory
Preliminary Experience with OpenMP Management Implementation Memory

Adrien Roussel, Patrick Carribault and Julien Jaeger

Presentation Slides

Memory Anomalies in OpenMP

Lechen Yu, Joachim Protze, Oscar Hernandez and Vivek Sarkar

Presentation Slides

13:30 The ROCm Software Stack
AMD Sponsor Tech Talk.  Gregory Rodgers, AMD.Presentation Slides

IWOMP 20202024-04-12T15:01:32+01:00

IWOMP 2019

IWOMP 2019 Program

IWOMP 2019 will be held in Auckland, New Zealand, at the University of Auckland

Full details of the event can be found at https://parallel.auckland.ac.nz/iwomp2019/

The main IWOMP workshop was held on September 12th-13th, 2019 (and a tutorial on the 11th)

The events were held in building 423:

  • Presentations: 423-340 (room 340)
  • Registration/breaks: 423-300L1 Foyer
  • Tutorial: 423-340 (room 340)

Thursday 12th September

8:30 Registration Opens
8:50am Welcome
9:00am Keynote:
Just How Far Can We Push Symmetric Multiprocessing? Caches All The Way Down?
David Abramson, Director of Research Computing, University of Queensland, Australia
10:00am Best Paper:
OMPSan: Static Verification of OpenMP’s Data Mapping Construct

Prithayan Barua, Jun Shirako, Whitney Tsang, Jeeva Paudel, Wang Chen and Vivek Sarkar
Slides
10:30am Morning Break
Tools
11:00am Score-P and OMPT: Navigating the Perils of Callback-Driven Parallel Runtime Introspection
Christian Feld, Simon Convent, Marc-André Hermanns, Joachim Protze, Markus Geimer and Bernd Mohr
11:30am ScalOMP: Analyzing the Scalability of OpenMP Applications
Anton Daumen, Patrick Carribault, François Trahay and Gaël Thomas
12:00am A Framework for Enabling OpenMP Autotuning
Vinu Sreenivasan, Rajath Javali, Mary Hall, Prasanna Balaprakash, Tom Scogland and Bronis R. de Supinski
12:30am Lunch Break
Accelerators
2:00pm HetroOMP: OpenMP for Hybrid Load Balancing Across Heterogeneous Processors
Vivek Kumar, Abhiprayah Tiwari and Gaurav Mitra
Slides
2:30pm Concepts for OpenMP Target Offload Resilience
Christian Engelmann, Geoffroy Vallee and Swaroop Pophale
3:00pm OpenMP on FPGAs — A Survey
Florian Mayer, Marius Knaust and Michael Philippsen
3:30pm OpenMP Dynamic Device Offloading in Heterogeneous Platforms
Ángel Álvarez, Iñigo Ugarte, Víctor Fernández and Pablo Sanchez
Slides
4:00pm Afternoon Break
Compilation
4:30pm Design and Use of Loop-Transformation Pragmas
Michael Kruse and Hal Finkel
Slides
5:00pm ompparser: A Standalone and Unified OpenMP Parser
Anjia Wang, Yaying Shi, Xinyao Yi, Yonghong Yan, Chunhua Liao and Bronis R. de Supinski
Slides
5:30pm The TRegion Interface and Compiler Optimizations For OpenMP Target Regions
Johannes Doerfert, Jose Manuel Monsalve Diaz and Hal Finkel
Slides
6:00pm Day 1 Close
7:00pm IWOMP dinner: The Wharf, Grand View
IWOMP 20192022-08-08T16:39:57+01:00
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